Block-Wise Mixed-Precision Quantization: Enabling High Efficiency for Practical ReRAM-Based DNN Accelerators

Resistive random access memory (ReRAM)-based processing-in-memory (PIM) architectures have demonstrated great potential to accelerate the deep neural network (DNN) training/inference. However, the computational accuracy of analog PIM is compromised due to the nonidealities, such as the conductance variation of ReRAM cells. The impact of these nonidealities worsens as the number of concurrently activated wordlines (WLs) and bitlines (BLs) increases. To guarantee computational accuracy, only a limited number of WLs and BLs of the crossbar array can be turned on concurrently, significantly reducing the achievable parallelism of the architecture.While the constraints on parallelism limit the efficiency of the accelerators, they also provide a new opportunity for the fine-grained mixed-precision quantization. To enable efficient DNN inference on the practical ReRAM-based accelerators, we propose an algorithm-architecture co-design framework called block-wise mixed-precision quantization (BWQ). At the algorithm level, the BWQ algorithm (BWQ-A) introduces a mixed-precision quantization scheme at the block level, which achieves a high weight and activation compression ratio with negligible accuracy degradation. We also present the hardware architecture design BWQ-H, which leverages the low-bit-width models achieved by BWQ-A to perform high-efficiency DNN inference on the ReRAM devices. BWQ-H also adopts a novel precision-aware weight mapping method to increase the ReRAM crossbar’s throughput. Our evaluation demonstrates the effectiveness of BWQ, which achieves a $6.08 \times $ speedup and a $17.47 \times $ energy saving on average compared to the existing ReRAM-based architectures.