Efficient Hardware Design of DNN for RF Signal Modulation Recognition Employing Ternary Weights

This paper presents an efficient deep neural network (DNN) accelerator designed for radio frequency (RF) signal modulation recognition. A novel DNN design optimized for mobile applications is demonstrated by combining MobileNetV3-based DNN with a ternary weight quantization. We also propose a new training method called decaying weight training to overcome the performance degradation due to quantization. The effect of the ternary weight quantization is demonstrated with a co-analysis of the classification accuracy and the physical design. The physical design analysis is based on the Application Specific Integrated Circuit (ASIC), and the results show that the ternary weight quantization with the proposed training method minimizes the impact of the quantization while increasing the allowable clock frequency and reducing hardware cost significantly. We also implement the hardware design dedicated to the ternary weight networks to reduce the required number of the multiply and accumulate (MAC) engines. The hardware design is verified on FPGA and the ternary weight-based DNN shows the feasibility of reducing the hardware cost significantly.