Dynamic Reliability Assessment of Vertical GaN Trench MOSFETs With Thick Bottom Dielectric

Dynamic stability of quasi-vertical GaN trench MOSFETs featuring a thick bottom dielectric (TBD) is thoroughly investigated. Degradation in forward drain current was observed as applying gate or drain stressing voltage, and further studied by time-resolved measurements. The drain current of the device can be maintained at 79%, compared to 61% of a reference device without TBD. Meanwhile, repeated switching tests conducted within a short on-state time demonstrate that the current collapse is confined to 10% after 500 switching cycles. The current collapse is related to electron capture at the dielectric/GaN interface, and the introduction of TBD reduces the electric field within the dielectric layer and suppresses the capture process of traps. Positive gate bias-induced threshold instability of the device with and without TBD is investigated. For the device with TBD, a small positive threshold voltage shift of 1 V is obtained. In addition, the effect of drain stressing voltage on devices is also revealed. High-resolution drain current transient spectroscopy displays the drain current reduction, attributing the degradation to captured electrons in the n--GaN layer. A capture activation energy of 0.26 eV is revealed by deep level transient spectroscopy. These findings reveal the efficacy of TBD inclusion in improving gate stability of GaN MOSFETs and underscore the critical importance of high-quality epitaxial growth for ensuring the stability of vertical devices. The stability characterization serves as a valuable reference for the development of reliable quasi-vertical GaN MOSFET devices.