SLAM-CIM: A Visual SLAM Backend Processor With Dynamic-Range-Driven-Skipping Linear-Solving FP-CIM Macros

Simultaneous localization and mapping (SLAM), a pivotal technology in robotics, autonomous vehicles, and surveillance, has gained prominence with the emergence of edge intelligence. Developing energy-efficient, low-latency SLAM systems is essential due to resource constraints and real-time demands. Compute-in-memory (CIM) architectures have been proven to be efficient for matrix multiplications. However, applications for SLAM raise new challenges in memory access and computation aspects: the linear system solving (LS) requires row transformation and causes frequent CIM updates, while the backend optimization causes redundant memory access; back-end optimization dominates SLAM’s computation and requires high precision and high dynamic range. Thus, we propose SLAM-CIM, a visual SLAM backend processor for edge robotics. A dynamic-range-driven-skipping CIM macro is designed to realize energy-efficient floating point (FP)-multiply-and-accumulate (MAC) operations. A preconditional-conjugate-gradient-based in-memory linear solver (PILARS) is designed to achieve LS without additional row transformations. This reduces memory access by 2.08
$\times$
and linear-system-solving latency by 3.84
$\times$
. SLAM-CIM further minimizes CIM weight updates through incremental bundle adjustment (BA), increasing average CIM utilization by 2.8
$\times$
. A silicon prototype is fabricated using 28-nm CMOS technology. The measurements show that SLAM-CIM achieves accurate and efficient SLAM operations with an average energy efficiency of 31.53 TFLOPS/W.