Methodology for Optimizing Ethernet Links at 10 and 25 Gbps for Critical Systems in the Aerospace Environment

The design flow of a board with high-speed links can be time-consuming and requires a meticulous study of all parameters that may affect signal quality. The path of a high-speed signal passes through various structures that can create impedance discontinuities, such as BGA (Ball Grid Array), vias, AC coupling capacitors, or connectors. Poorly matched impedance can lead to unwanted signal reflections, energy losses, and electromagnetic interference. Each of these elements must be carefully analyzed to minimize the overall impact of each transition. This optimization work must take into account manufacturing constraints, frequency-dependent properties of materials, cost, as well as the reality of routing density that limits available space. An efficient methodology and design rules are developed to prepare for future designs and push the technological boundaries of aerospace products.