CMOS-Compatible Low-T Processing Methods for HZO-based DRAM capacitors by E-field Cycling

To propel the miniaturization of the dynamic random access memories (DRAM), obtaining capacitor dielectric materials of lower equivalent oxide thickness (EOT) and lower leakage is essential. Herein, we demonstrate a CMOS compatible (complementary metal-oxide-semiconductor) post-processing method for HZO-based metal-insulator-metal (MIM) capacitors, namely, low-temperature annealing combined with electric field (E-field) cycling. The low-temperature annealing process induces crystallization of the dielectric material, while the subsequent E-field cycling method further enhances the crystallization and fine-tunes the HZO phases to achieve high-k. Compared with direct high-temperature annealing, this approach not only has a lower thermal budget which makes it compatible with the CMOS fabrication processes, it also can achieve a smaller EOT while maintaining low leakage, satisfying the requirements of the capacitor dielectric materials for the next-generation DRAM cell.