A novel test and analysis scheme to elucidate tail bit characteristics in STT-MRAM arrays

We propose a simple and efficient test and analysis scheme to identify and categorize defective bits in large-scale STT-MRAM arrays using the switching voltage (V
sw
) distribution from single measurement sequence for both set and reset operations. We analyzed V
sw
with statistical approach of complementary cumulative distribution function (CCDF) and observed a high V
sw
tail with low probability, similar to the ballooning feature in write error rate analyses on STT-MRAM devices. We demonstrate such ballooning feature in V
sw
CCDF clearly originates from devices with relatively low resistance and TMR ratio, generally attributed to the magnetic tunnel junction (MTJ) pillars with soft shorts caused by re-deposition during the patterning process. The key advantage of present test and analysis scheme is the ability to differentiate defective bits such as soft-shorted devices from normal devices directly from the arrays without reading resistances and consequently to improve the speed and efficiency of STT-MRAM product development.