Novel Cross-Point Architecture utilizing Distributed Diode Selector for Read Margin Amplification

While cross-point array architecture provides ultimate area efficiency for low-cost memory solutions, it also faces some challenges. On top of the complexity associated with co-integration of a selector device (e.g., a diode) with a resistive memory element (ME), the resulting 1D1R cell suffers from the read margin (RM) degradation due to the voltage redistribution between the two sub-components. The present work provides a detailed investigation of this issue and proposes a novel cross-point architecture to alleviate it. It features a distributed Schottky diode (i.e., spanning the full length of the access line) which simultaneously constitutes an embedded MeSFET, thus providing a tunable connection between the neighboring cells to directly control the voltage across the selected ME. Operation of such an array is discussed, with simulation results confirming effective RM amplification without additional footprint penalty. Finally, the concept is validated experimentally by fabricating InGaZnO-based MeSFET, demonstrating good rectification.