Optimization of Void Defects at TiN/Si:HfO2 Interface for 3-D Ferroelectric Memory

In the 3D ferroelectric memory fabrication process, the outer Titanium nitride metal electrode and silicon doped hafnium-based ferroelectric layer will produce void defects at the interfaces, causing increased leakage and compromising device performance. These void defects are caused by the volume contraction during the phase transition process, which leads to tension at the outer interface of the 3D ferroelectric capacitor structure. Due to the unavoidable structural stress, it is necessary to optimize the interface bonding energy. First principles simulation revealed insufficient binding energy between titanium nitride and silicon doped hafnium oxide ferroelectric materials, while introducing an amorphous alumina interface layer can effectively improve the binding ability. Experimental verification has confirmed that using an amorphous alumina interface layer as an adhesive layer can successfully solve the interface void defects, thereby improving the ferroelectric properties in three-dimensional structures.