Carbon/Nitrogen Dual-Doped in <100> P-Type Silicon Hard Mask for Wafer Thinning and Dishing Less for Hybrid Bonding

Wafer thinning technology can provide high-density interconnections for integrated circuits, reduce power loss, and fulfill the demand for thin and miniaturized packaging of devices, thus realizing the goal of comprehensively improving the performance of semiconductor devices. Higher density chip connectivity through dual ion selective higher etch Ratio, lower on-resistance and ultra-thin die packages.