A Low Phase Noise PLL Design Based on Self-Injected Locking and In-Loop Mixing Technique

In this letter, a combined technique of self-injection locking and in-loop mixing (SIL-MIX) is applied to a phase-locked loop (PLL) frequency synthesizer, which significantly reduces the integrated phase noise of a conventional PLL frequency synthesizer. Simultaneously, a phase noise model and calculation formula of the PLL based on the SIL-MIX method is proposed and has a high degree of consistency with the measured results. In addition, the designed programmable phase shifter provides a novel perspective on the board-level system integration of frequency synthesizers. Experimental results demonstrate that the phase noise of the developed prototype using the SIL-MIX loop is reduced up to 19 dB. The substantial decrease in phase noise enables the developed frequency synthesizer to achieve extremely low phase noise of −108, −111, −137, and −142 dBc/Hz at offset frequencies of 10 kHz, 100 kHz, 1 MHz, and 10 MHz, respectively.