A Comprehensive Analysis of a Low Noise Amplifier with -20.02 dB Return Loss and 58.34 dB Open-Loop Gain

The Low Noise Amplifier (LNA) is a fundamental component in wireless communication systems. LNA is essential for alleviating the inherent noise associated with amplifier gain during the reception of signals in RF receivers. This research paper delineates the design, simulation, and layout of Low Noise Amplifier configuration, employing 45nm technology in Cadence Virtuoso. The devised LNA exhibits an excellent phase margin of 82.68° within the 2.4 GHz frequency spectrum, which reflects a staggering stability of the proposed design. Noteworthy achievements include an impressive gain of 58.34 dB, coupled with an exceptionally low power consumption of 0.33 µ W at a nominal supply voltage of 0.9 V. This design has a 1 dB compression point (P1dB) of -38.31 dBm an IIP3 of -52.13 dBm and a small chip area of 432,194.528 nm
²
. This paper also presents Parasitic Extraction (PEX), PVT corner analysis, and Monte Carlo simulation of the design. As the proposed LNA has a very high gain, it can be an ideal candidate for an RF input frontend receiver module in a noisy environment.