Deep Reinforcement Learning-Based Automatic Test Pattern Generation

Automatic test pattern generation (ATPG) is a key technology in digital circuit testing. In this paper, we propose an ATPG method based on deep reinforcement learning (DRL), aiming to reduce the backtracking of ATPG and thereby improve its performance. Specifically, we apply deep Q-network (DQN) in reinforcement learning to the PODEM (path-oriented decision making) ATPG algorithm, and design a reward function to maximize cumulative rewards through continuous interactions with the circuit. Such a design can enable the DRL agent to learn the optimal policy to guide backtracing decisions within PODEM. Experimental results show that the proposed method can perform better than traditional and artificial neural network (ANN)- based heuristic strategies on most benchmark circuits.