Multifunctional RRAM Chip with Configurability for Sparsity-Aware in-Memory ISNG Machine

The Ising machine is a kind of annealing processor. When a combinatorial optimization problem is mapped on an Ising graph, the Ising machine calculates the physical evolution of this system and solves the problem. RRAM-based in-memory computing (IMC) is an important technique that can build up Ising machines. However, the high sparsity of the Ising graphs still fundamentally limits the time and energy efficiency. In this work, we propose a multifunctional RRAM chip that suits sparsity-aware in-memory computing Ising machine, which contains RRAM accelerated content-addressable memory (CAM), multiply-accumulate (MAC) unit, and true random number generator (TRNG) to work collaboratively. Such RRAM-based Ising machine provides significant improvement in both computing speed and energy consumption.