New Insight into Impacts from Read Cycle Number and Voltage Sweeping Direction on Memory Window of Ferroelectric Fet

In this work, impacts from cycle number and direction of sweep voltage on electrical characteristics of ferroelectric FET (FeFET) during readout are investigated. Considering polarization switching dynamics, it is found that the memory window (MW) of FeFET shows large dependence on both sweep time and read cycle number. Under continuous sweep voltage cycles for readout, MW will gradually degrade. Furthermore, MW dependence on sweep direction of gate voltage is demonstrated, showing significant
$V$
TH
shift under reverse sweep for erase state. This work provides theoretical analysis for more accurate MW estimation of FeFET.