NoPIM: Functional Network-on-Chip Architecture for Scalable High-Density Processing-in-Memory-based Accelerator

A functional network-on-chip (NoC) architecture for processing-in-memory (PIM), NoPIM, is proposed to enhance the scalability and optimize the system performance of high-density PIM. The proposed NoPIM reconfigure core architecture with functional NoC for varying workload with different sizes of channel. The two types of NoPIM architecture is proposed with different topology: NoPIM-Homo and NoPIM-Hetero. Both architectures were evaluated on existing PIM IP and showed energy efficiency improvements of 1.49 to 1.53 times on actual benchmarks. Additionally, the NoPIM-Hetero structure showed up to 1.8 times improvement in energy efficiency with less than 8% area overhead compared to the baseline. As a result, the proposed NoPIM architecture was presented as a scalable solution for PIM IP-based processor implementation.