Repetitive Pulse Testing for LDMOS Transistor Reliability

In this paper, the impact of hot-carrier injection due to repetitive pulse switching of lateral DMOS transistors is studied. The proposed testing technique is used to emulate the dynamic switching conditions and the transistor reliability characteristics are compared with traditional DC measurement at constant gate/drain voltages. Experimental data shows that the repetitive pulse degradation under 6.6V drain stress is between two DC conditions (5.5V and 6.6V).