SILC and TDDB reliability of novel low thermal budget RMG gate stacks

The fabrication of gate stacks with a low-thermal budget is crucial for enabling upcoming CMOS technology innovations such as sequential 3D integration and CFETs. In this study, we explore the impact of different low-thermal gate stack treatments on SILC and TDDB of HKMG stacks. We compare low thermal budget gate stacks with hydrogen radical treatments, recently introduced to improve the pMOS NBTI reliability, or with a post-deposition anneal at reduced temperature against a standard high thermal budget reference gate stack. We show that, while the former ones yield only minor improvement in TDDB lifetime, the latter treatment matches the TDDB reliability of the high-temperature reference, and thus provides a TDDB solution for low thermal budget CMOS RMG at competitive EOTs.