A 7V/μs-DVS Class-G Digital-Shunt-Aided Buck Voltage Regulator Achieving a 7% Dynamic-Efficiency Drop at a 600kHz DVS Occurrence Frequency in 28nm CMOS

As system-on-chips (SoCs) become more complex, the need for voltage regulators to quickly respond to dynamic workloads grows increasingly critical. To overcome the slow response of inductor-based DC-DC converters, hybrid power systems, assisted by a dynamic shunt stage, have been actively studied [1]–[4] (top of Fig. 1). Leveraging the fast shunt stage, previous hybrid buck-shunt voltage regulators have demonstrated sub-us dynamic voltage scaling (DVS) [2], [4] and voltage-droop mitigation [1], [3]. Nonetheless, the frequent activation of the shunt stage cannot be overlooked, as it leads to considerable energy loss
$(E_{\text{LOSS}})$
, degrading dynamic efficiency. The
$E_{\text{LOSS}}$
dissipated by the shunt stage arises mainly from two factors: the shunt stage's dropout voltage,
$V_{\text{DO}}(= V_{\text{IN}} - V_{\text{OUT}})$
, and its supplying charge,
$Q_{\text{SHUNT}}$
. Although [3] mitigates
$E_{\text{LOSS}}$
via a reduced V
DO
$(=V_{\text{A U X}}-V_{\text{O U T}})$
, this approach requires an auxiliary supply voltage,
$V_{\text{AUX}}(< V_{\text{IN}})$
. While
$V_{\text{OUT}}$
quickly settles with the aid of the shunt stage after a load (or voltage) change, a certain handover time is still needed for the inductor current
$(I_{\text{IND}})$
to align with the changed load current
$(I_{\text{LOAD}})$
. During this handover period, the shortfall in
$I_{\text{LOAD}}$
must be replenished by the shunt current,
$I_{\text{SHUNT}}(=I_{\text{LOAD}}-I_{\text{IND}})$
. This becomes a major factor that unnecessarily increases
$Q_{\text{SHUNT}}$
, as depicted in the middle-right of Fig. 1. Moreover, the lack of correlation between
$I_{\text{SHUNT}}$
and
$I_{\text{IND}}$
in [2], [3] tends to prolong the handover time further, exacerbating the increase in
$Q_{\text{SHUNT}}$
.