nvXNOR Design with Enhanced Store Capability for BNN Applications

Binarized Neural Networks manifest themselves as an efficient alternative to Deep Neural Networks with great potential for in-memory compute applications. We propose non-volatile XNOR designs with enhanced store capability for purposes of low-power BNN applications. The designs improve the embedded SRAM pull-up capability during reset and restore without compromising the cell functional aspect ratio while exploiting the XNOR cell transistors. This results in enhanced reset and operating memristor window which further contribute to the designs’ enhanced restore yield. We study the designs for the high endurance memristor window range and demonstrate up to 29% reduction in the energy-delay-product compared to an equally sized traditional non-volatile XNOR cell. Finally, we implement an error-injection algorithm on a BNN network model built using Larq and demonstrate <1% test accuracy loss for the proposed design due to the enhanced yield compared to 8% accuracy loss for the traditional design.