A single chip FSK modem

In the development of a fully LSI-designed single-chip 300-b/s asynchronous FSK modem, two `hard to beat' problems are: (1) to build both analog and digital circuits on-chip in-such a way that the modem performance is practically free from line noise and transmission distortion; and (2) to meet the requirement (CCITT V.21) of a +5 dBm level margin to discriminate carrier-on from carrier-off under the rigid operating conditions expected. It was found that a combination of high-gain limiter, digital PLL, and postdetection filter in the demodulator section was useful to solve the first problem. A combination of a stabilized rectifier and voltage reference generator contributed to the solution of the second problem. Measurements on chips indicated at /spl plusmn/12% isochronous distortion in the received signal level range of -5 to -45 dBm, a 10/SUP -5/ bit error rate at an SNR of 3 dB, and /spl plusmn/0.15 dB carrier detection level deviation over the temperature range from -20 to +100/spl deg/C within the supply voltage variations of /spl plusmn/10%. Switched-capacitor filters were used throughout the analog section. The device requires two power supplies, +12 and +5 V. The power consumption is 85 mW, and the chip size is 5.9/spl times/5.4 mm.