STL versus ISL: an experimental comparison

Schottky-transistor logic (STL) and integrated Schottky logic (ISL) have been fabricated in both 4-/spl mu/m and 2-/spl mu/m oxide isolated processes and characterized over the military temperature range (-55 to +125/spl deg/C ambient). The temperature coefficient of the average propagation delay (t/spl tilde//SUB pd/) is positive for STL over the entire operating current range. For ISL, the temperature coefficient of t/SUB pd/ is negative at low currents and positive at high currents. Both the 4-/spl mu/m and 2-/spl mu/m ring oscillator designs studied showed this behavior. At 25/spl deg/C, t/SUB pd/ data indicate no difference between STL and ISL for practical purposes. At -55/spl deg/C, the STL has a slight (~0.1 ns) speed advantage over ISL. At 150/spl deg/C (junction), the 2-/spl mu/m STL gates with a 200 /spl Omega///spl square/ base sheet resistance have the lowest minimum t/SUB pd/ of the gates studied (0.9 ns at a total current of 190 /spl mu/A) compared to the best for ISL at 1.0 ns and 150 /spl mu/A. The ISL operates at a lower logic swing than the STL at 105/spl deg/C, and has a speed advantage in the current range useful for VLSI. Additional data are presented which demonstrate the effect of the base resistance, epitaxial resistivity and substrate resistivity on delay.