Adapting Robotics Vision Algorithms for Space Rated FPGAs

Field Programmable Gate Arrays (FPGAs) are widely used in space applications due to their performance per watt characteristics and excellent radiation tolerance [1]. Development times for FPGAs are significantly higher than those for Central Processing Units (CPUs) or Graphics Processing Units (GPUs). Complex algorithms have more difficult development lifecycles than do simple applications. A complex algorithm onboard an FPGA is a very difficult prospect for the budgets and timelines of numerous applications as a result. This research explores the development of a Computer Vision (CV) algorithm on an FPGA.High Level Synthesis (HLS) has the potential to dramatically reduce development times for FPGAs [2] [3]. The reality of this claim was examined by the research team through the course of this project through the evaluation of a stereo vision CV algorithm in HLS. This algorithm was implemented in the widely used OpenCV library [4]. Of the different HLS libraries, Xilinx’s Vitis HLS contains a pre-written adaptation of the OpenCV library [5]. This adaptation was used by the research team to quickly benchmark an off the shelf stereo vision algorithm onboard an FPGA.Images used for benchmarks consisted of both open data sets such as KITTI and internal data captures possessed by Southwest Research Institute (SwRI) [6]. Metrics for this application consisted of accuracy, throughput, and resource utilization. Results for these were ninety-nine (99) percent good pixels when compared to the CPU implementation, thirty-four (34) frames per second (fps) with 1920x1080 pixel images, and the usage of less than ten (10) percent of overall FPGA resources, respectively. All these metrics were measured using the pure HLS implementation, although computationally expensive pieces of the application were reimplemented in the Verilog Hardware Description Language (HDL) for comparison.