A Step-by-Step Layout Transformation Approach to Differentiate How Multiple Layout Dependent Effects Modify Device and Circuit Performance

Ring oscillators (ROs) are important components of electronic circuits. Their performance, however, is susceptible to parasitic effects when device sizes scale down. We present a methodology, that uses a series of test structures which step-by-step transform an RO layout into single-device modeling layouts, to differentiate and quantify the impact of individual layout dependent effects on device DC performance. A model that is tuned to fit the DC characteristics of the devices in an RO, which are subject to multiple LDEs, gives correct timing behavior.