A Novel Anisotropic Wet Etching Process of (100)-Silicon with Areaefficiency on Convex Corner Compensation Patterns

This work demonstrates an anisotropic wet etching process of (100)-silicon wafers for the realization of compact mesa structures under deep etching conditions. Utilizing specially designed 100-beam compensation patterns, this process is a two–step etching method in which the wafers are etched in surfactant added TMAH solutions and pure TMAH solutions in succession. Process simulation by software Intellisuite was used to help decide the specific parameters of the process, compared to the state-of-art technologies, the area of the compensation patterns can be reduced by 90% at most, and results from a following experiment proved the validity of the simulation and effectiveness of the process.