A Time-Matched SiO2-Layer Etch for Advanced MEMS Foundry Processesd Multi-Project Chip (MPC)

Integration of MEMS devices strongly influenced by the micromachining method via actual devices is planned to be released. Etching (releasing) of sacrificial material is performed to create 3D suspended geometries, and it is always advisable that the etching procedure must have better robustness (and/or good protection). But even though etching is accurately timed, the depth of etching in the case of MPC cannot be decided precisely, mainly due to the involvement of hybrid devices with different geometry (shape/size). We use a commercially adopted SiSiO
2
process and introduce a prevention method for residual effects (stress and undercut) which are hard to control. Using the presented method, actuation voltage as small as 7 V are achieved by etching through 1-μm of SiO
2
materials.