Analyze and Optimize the Performance of InGaN-Based DG-JL-TFET Through Efficient Design and Investigation

This article presents a comprehensive examination of the efficient design and analysis of a Double Gate Junction less Tunnel Field-Effect Transistor (DG-JL-TFET) using InGaN as the material. The research focuses on addressing intrinsic challenges in TFET architectures, particularly Random Doping Fluctuations (RDF) and restrictions in current-driving capabilities, which have a negative impact on device performance and electrostatic behaviour. In order to address these difficulties, DG-JL-TFET architectures are utilized, using consistent doping to improve the overall performance of the device. The incorporation of InGaN materials into the source, drain, and channel regions additionally enhances performance. The work successfully implements InGaN-DG-JL-TFET using TCAD simulation, resulting in significant characteristics such as a sub threshold swing (SS) of 27mV/dec, an On-State current (
$I_{On}$
) of
$5.9 \times 10^{-3}$
A, an off-State current of 9.6fA, and a Threshold Voltage
$V_{t}$
of 0.47V. The objective of these improvements is to improve the efficiency and functioning of the gadget. The findings of this study provide insight into the potential of InGaN-based DG-JL-TFETs as very promising contenders for advanced electronic applications.