An on-chip back-bias generator for MOS dynamic memory

An on-chip back-bias generator for 64K dynamic MOS RAM has been developed.The use of this generator achieves the goal of a single 5 V power supply part while preserving the advantages of substrate bias in n-channel MOS technology. These advantages include the elimination of substrate injection current from localized forward biasing of diodes, improved speed and power characteristics, and a larger differential data signal on the bit sense lines. The generator circuit avoids several pit-falls on on-chip V/SUB BB/ generation. The circuit pumps to a known regulated voltage. This avoids substrate drift with changes in substrate current resulting from changes in cycle time. This drift will change device characteristics and degrade storage levels. A unique two-level reference scheme avoids changes in substrate bias voltage that otherwise result from the shift in V/SUB BB/ between precharged and active memory states when memory duty cycle changes. The standby power used by the generator is only 0.74 mW.