A 25-kHz-BW 97.4-dB-SNDR SAR-Assisted Continuous-Time 1-0 MASH Delta–Sigma Modulator With Digital Noise Coupling

This article introduces a high-resolution continuous-time delta–sigma modulator (CT DSM) architecture that incorporates a successive approximation register (SAR)-assisted digital noise coupling (DNC) technique and a multi-stage noise-shaping (MASH) structure. The limited maximum stable amplitude (MSA) problem due to the high-order-shaped large quantization error (
$E\textsubscript{1}$
) in the previous single-loop DNC DSM is alleviated by adopting an M-0 MASH architecture, where
$E\textsubscript{1}$
is low-order shaped within the first stage. With a zeroth-order second stage and digital cancellation filter, only the second-stage quantization error (
$E\textsubscript{2}$
) is present in the final output, where it is shaped aggressively by the conjunction of the first-stage noise-transfer function (NTF) and DNC. Fabricated in 28-nm CMOS, the prototype demonstrates that a high-order CT DSM can be realized with low-order analog loop filters through the combination of MASH and DNC architecture, achieving peak values of signal-to-noise and distortion ratio (SNDR), signal-to-noise ratio (SNR), and dynamic range (DR) of 97.4, 98.4, and 100.2 dB, respectively, in a 25-kHz bandwidth while consuming only 260
$~\mu$
W from a 1.1-V supply. The SNDR-based Schreier figure-of-merit (FoM) is 177.2 dB.