Comments on "Improved feedback ECL gate with low delay-power product for the subnanosecond region"

An alternative circuit configuration to that described by Rein and Ranfft (see ibid., vol.12, p.80, 1977) is identified from an analysis of a generalized feedback ECL structure. The analysis derives dc noise margin nomograms and suggests circuit strategies. Results of computer simulations are given which demonstrate a superior transient performance.