V2Va: An Efficient Verilog-to-Verilog-A Translator for Accelerated Mixed-Signal Simulation

This paper introduces a streamlined Verilog-to-Verilog-A (V2Va) translation tool that automates the conversion of Verilog designs into Verilog-A, enabling concurrent simulation of analog and digital circuits. Through a set of mapping rules, V2Va facilitates mixed-signal simulations in an analog environment, negating the requirement for a separate mixed-signal simulation engine and overcoming multiple types of EDA licensing obstacles. Our methodology demonstrates a notable acceleration in mixed-signal simulation, surpassing 2 ×, underscoring its significant impact and applicability in the domain of circuit design.