Closed Loop Digital Design of Active Gate Driver based Power Converter

Silicon-Carbide (SiC) MOSFETs have gained significant adoption in power converters due to their superior performance over their Silicon counterparts. Active gate drivers (AGDs) are emerging technologies to drive SiC MOSFETs for further enhancing the power converter’s efficiency and Electromagnetic Compatibility (EMC) performance, as they can generate precise gate waveforms to minimize voltage/current overshoots and oscillations in the driven device. This paper is focused on developing a Closed Loop Digital Design (CLDD) method to unleash AGDs’ full potential of optimizing the efficiency, and electromagnetic compatibility of using SiC MOSFETs in power converters. The CLDD design method comprises four stages: characterization, modeling, optimization, and verification. Experimental results present the characterization and modeling stages by conducting double pulse testing on the SiC MOSFET using a bespoke AGD at a drain voltage of 400 V and drain current of 10 A. An artificial neural network (ANN) based optimization is used to optimize the gate driving waveforms. The result demonstrates the successful damping of the drain current oscillation and overshoots during the turning on of the SiC devices while maintaining a favorable energy loss. Compared to traditional design methods, this also gives a fast and accurate design method for AGD-based power converters.