Modelling the Effect of the DC Link Decoupling Capacitor of a Commutation Power Loop Using a Thevenin-Based Frequency Domain Approach

The high commutation speed of wide band-gap devices causes undesired voltage overshoots and oscillatory behavior observed across the drain-source port. The mitigation of these voltage overshoots and oscillations caused by the resonant interaction between the commutation loop parasitic inductance and the switch parasitic output capacitance requires additional design considerations. In this work, a Thevenin-based frequency domain approach for modelling the switch voltage overshoot and oscillations with respect to the commutation power loop is proposed. The switching transition and its associated slew rate is modelled using a clamped-ramp function. The two figures of merit used to quantify the effect of the circuit elements in the commutation power loop with respect to the resonant oscillations are the voltage overshoot and time to steady state. Using the clamped-ramp function and the two figures of merit, the effect of the parasitic inductance and the decoupling capacitor on the power loop is analyzed. The trends observed from the analyses are used to obtain recommendations regarding the sizing and placement of the decoupling capacitor in the power loop. The proposed Thevenin-based frequency domain model is experimentally validated by comparing the analytical results with both the LTspice simulations and the experimental waveforms for a SiC-based 400 V, 20 A double pulse test.