Current Balancing of Parallel High Current SiC Half Bridge Modules using Delay Based Active Gate Driving with Inter-Device Inductances

Silicon Carbide MOSFETs offer reduced switching losses and faster switching speeds when compared to similarly rated Silicon IGBTs, however the use of these devices in medium to high power applications has been limited due to their comparably lower module current ratings. This study investigates a topology for paralleling Silicon Carbide MOSFET half bridge modules to create a composite switch capable of higher current carrying capabilities. This topology aims to achieve effective current sharing between modules, which has been is a widely reported issue that can result in thermal runaway and early device failure if not carefully managed. To accomplish this a combination of delay based active gate driving with current limiting inter-device inductances are employed. A comprehensive overview of the current balancing mechanisms is detailed alongside two distinct control strategies for this topology, ‘Fixed Delay’ and ‘Variable Delay’. These were both experimentally tested with 2 modules at 800 A, with the variable delay strategy demonstrated overcoming an imbalance of 80 A and the fixed delay strategy shown balancing at 1600 A with 4 modules. A 2 level converter LTspice simulation with two modules in parallel switching using the fixed delay strategy is also presented to validate performance in an AC/DC converter.