Parasitic Inductance Network Modeling Method for Power Module Inner Wirings Based on Inductance Matrix Measurement

In recent years, using SiC devices for fast switching have led to the miniaturization of power modules. However, due to the high di/dt of fast switching, false triggering and parallel oscillation caused by high di/dt have become an issue. A method for extracting equivalent circuits, including parasitic inductance, is essential to solve these issues. In power modules, multiple devices are often connected in parallel to meet the demand for high power density. Therefore, complex mutual coupling between wirings makes it challenging to determine the equivalent circuit, including parasitic inductance. In this paper, we propose an equivalent circuit extraction method for power modules that focuses on current loops instead of focusing on the wiring section as in previous studies. The proposed method can extract the effective inductance considering the mutual coupling between wires with fewer measurements than the conventional method. We first summarize the concept of inductance and explain the advantages of the extraction method, focusi ng on current loops. Next, the equivalent circuit, including the parasitic inductance of a double-pulse test circuit board with SiC-MOSFETs connected in parallel, is extracted using the proposed method. To confirm the validity of the proposed method, a double resonance system was constructed using the test circuit board wiring, and the frequency characteristics of the actual measurement and the simulation based on the extracted parasitic inductance were compared.