Design and Automated Layout Generation of a PMIC Core in Skywater 130nm Open-Source Technology

This paper presents the co-design of a DC-DC power converter and a series low dropout (LDO) linear voltage regulator targeting the highly efficient generation of a 3V regulated supply voltage from a 5V power source, together with the automatic layout generation of the power stage based on the system specifications. The power supply chain has been designed using the Skywater 130nm technology and open-source design tools. Firstly, the power stage is realized using an automated flow which considers the output current, the output voltage, the operating frequency and the maximum area as main constraints entered by the user. An example buck converter is designed for a maximum 91% efficiency at 75mA load current, yielding a total silicon area of 0.275mm
²
. Secondly, a general purpose LDO regulator is designed and simulated, targeting a 3V regulated output voltage. The frequency performance of the power supply rejection ratio (PSRR) of the LDO is explored and determines the switching frequency of the DC-DC buck converter. Finally, the full system is simulated, achieving 2mV ripple and 86.3% overall efficiency. The full system uses 0.561mm
²
of silicon area.