A Low-Power High-Speed Dynamic Comparator with Temperature Compensation

This paper presents a low-power high-speed dynamic comparator with temperature compensation. In conventional dynamic comparator design, designers tend to pursue high speed and low power consumption, while ignoring the influence of temperature on comparator performance. However, simulation results show that temperature variation has a significant impact on the delay of conventional dynamic comparators. A novel preamplifier stage with a temperature compensation structure is proposed in this paper. By optimizing the temperature characteristics of hybrid resistors, the delay fluctuation with temperature is effectively reduced. Furthermore, an initial voltage is given to the output to reduce the delay. This comparator is implemented in a $0.18 \mu \mathrm{m}$ CMOS technology. Simulation results show that, compared with the conventional double-tail comparator, the typical delay of the dynamic comparator is reduced by $45 \%$, and the power consumption is reduced by $27.6 \%$; The delay variation at different temperatures is reduced by $8 \times$.