Impact of p-Gate Contact in GaN-HEMTs on Overvoltage Stress Failure

Failure process by overvoltage stress in GaN-HEMTs is compared between Schottky and ohmic p-gates by burst unclamped inductive switching (UIS) waveforms and C–V characteristics shift. One of the critical disadvantages of GaN-HEMTs is their lack of UIS withstanding capability because there is no removal structure of holes, which is generated by the avalanche breakdown. Although the overvoltage margin for the GaN power converters has been discussed by dynamic breakdown voltage, the failure process by overvoltage stress has not been discussed sufficiently. This article reports that overvoltage stress generates a local shunt path that depends on the gate contact. An increase in
${C}_{\textit {ds}}$
is seen due to the trapping of holes generated by avalanche breakdown. These results verify that the catastrophic failure of GaN-HEMTs by overvoltage stress can be ascribed to the dielectric breakdown of hetero-epitaxial layers by hole current.