Alabama A&M Symmetric Overloaded Reduced Instruction Set Architecture (SORA)

In this paper, the open instruction set architecture for the symmetric overloaded reduced instruction set computer architecture (SORA) is presented. Last year, A&M presented a paper describing the symmetric overloaded minimal instruction set computer architecture (SOMA). The SOMA architecture focused on an overloaded instruction set where register-to-register instructions and integer instructions are symmetric and overloaded: Rl = R2 / [R3 | const] in BNF notation. Each register instruction has a corresponding integer class instruction. The SOMA architecture uses a C-like if{} statement for branch instructions. SORA paper focuses on creating a reduced instruction set computer (RISC) architecture based on ideas from SOMA paper plus some improvements. Assembly language was developed back in 1947 by K. Booth. IBM 360, Intel 4004, 6502, 8085, x86, 68k, MIPS, RISC- V, ARM, etc. all use a text based assembly language with typically four fields. In 76 years assembly language has not changed. Assembly language needs to be re-invented for the 21
^st
century. In modern terms, assembly languages with high level language features are called meta-assembly or high level assembly. The IBM 360 assembly language, circa 1964, incorporated loops and if statements like modern high level languages. The Xerox Meta-Symbol Sigma 5–9 Computers, circa 1975, incorporated high level language features in its assembly language. RISC architectures have a common set of basic operations. The SORA C-like assembly statements can be applied to create a proto-assembly language that can be applied across RISC architecture families.