A General Modeling and Analysis of Impacts of Unbalanced Inductance on PWM Schemes for Two-Parallel Interleaved Power Converters

This article presents a comprehensive analysis of the impacts of inductor imbalance on the switching-related performance indicators (namely line-current ripple, high-frequency zero-sequence circulating current, and common-mode voltage) of two-parallel converters. It addresses this longstanding issue by presenting a general model that captures the dynamic behavior of the actual output voltages under imbalanced inductance. The central finding from our general model reveals that unbalanced inductances introduce additional voltages to the original common mode voltage, with the amplitude directly proportional to the imbalance degree. Those additional voltages cause the actual output voltages to deviate from the ideal ones under balance inductance, turning the traditional static vector plane into dynamic entities. Moreover, our general model reveals that these additional voltages deteriorate the switching-related performance indicators in both centralized and decentralized systems. However, due to their high-frequency characteristic, it is impossible to compensate for these additional voltages. Recognizing the unfeasible compensation, we have formulated a general analytical approach to identify general tolerance thresholds of inductance imbalance within which the switching-related performance indicators remain largely unaffected. Finally, the experimental results validate our theoretical evaluation of the unbalanced inductance's impact on switching-related performance indicators. The proposed general model and the analytical approach lay the foundation for future research into the impact of inductance imbalances on the switching-related performance indicators in parallel topologies.