Process Variation Impact on Dual Dielectric Gate-All-Around Tunnel FETs

During fabrication of cylindrical gate-all-around (GAA) structure, the probability of getting uneven radius is highly probable which result in significant changes from its predefined performance expectations. In this work, a III-V GAA structure has been used. In addition, high-k gate dielectric has been employed close to source-to-channel junction and low-k gate dielectric has been used closed to drain-to-channel junction to enhance the tunneling efficiency and reduction in ambipolar current (IAmb). The analog/RF FoMs have been analyzed for probable variation in radius with variation in device geometry during fabrication. The cylindrical GAA counterpart has been compared with elliptical variation in their geometry i.e., aspect ratio of 0.5. The device has been further compared with fully channel low-k dielectric and high-k dielectric. The optimized structure, analog, and RF figures-of-merits are evaluated to get a clear understanding of such variations.