Integrating Low Power Data Encoding in Intel Advanced Interface Bus

The ever-growing need for computational power has led to advanced packaging technologies for integrated circuits. One such technology is 2.5D integration, which reduces the distance between chiplets in a single package, resulting in a reduction of delay and power during data transfer. To connect chiplets, Intel created the Advanced Interface Bus (AIB), an open-source interface, as a universal solution for low power chiplet communication through a wide parallel channel with a low complexity circuit and an active redundancy scheme. However, with the increase in frequency of the interconnect, a considerable part of the total system power is used for data transfers. To reduce the power consumed by the interconnect, data encoding schemes are deployed. This paper explores the integration of our encoding scheme Adaptive Word Reordering (AWR) in Intel’s AIB, evaluating the energy savings that can result by combining an emerging industrial interface with a modern data encoding technique. The results show that with the integration of AWR in AIB, the total power is reduced by 5.5% whereas the included Data Bus Invert (DBI) encoding scheme does not achieve noticeable improvement for the evaluated workloads.