A Cooling System based on Wafer-level Microfluidic Channels for the System-on-Wafer Packaging Application

With the development of electronic products towards high-density integration and high power, the system-on-wafer (SoW) packaging is a promising technology. In this paper, heat dissipation capability of a wafer-level cooling system was researched based on the finite element modelling (FEM). We built a 3D integration model to research heat dissipation capabilities with different flow rates and fluidic channel depths. The results showed that there was a positive correlation between flow rate and heat dissipation capacity of the fluidic channel. With the same water flow rate, the heat dissipation capacity gradually increased as the channel depth decreased. This paper also presents a cooling system based on a wafer-level fluidic channel for the SoW packaging application. A 4-inch silicon wafer with a thickness of 500 µm was used as a substrate of the SoW. Nine dummy heating chips were attached on the wafer to mimic the heat situation when the SoW was working. Compared with an average temperature of 120°C of dummy heating chips with natural air cooling, an average temperature of 55°C was measured using the wafer-level fluidic channels. When the flow rate inside the channel was 1.5 L/min, the heat dissipation capacity of the fluidic channel cooling system was 0.14 W/mm², and the thermal resistance was 0.141 °C/W. This is a significant improvement in wafer-level cooling performance, indicating that the microfluidic channel cooling system is highly effective in dissipating heat.