Assessment of Competing Risk-of-Failure in FCBGA Interfaces Operating in Harsh Automotive Underhood Environments for Periods up to 1-Year

The increasing use of electronic components in modern vehicles has enabled advanced driver assistance systems such as lane departure warning, collision avoidance, and navigation. These systems require highly advanced packaging architectures, including the flip-chip ball grid array, to support the necessary processing and memory functions. However, these components are susceptible to failure due to thermal excursions and sustained high-temperature exposure, compromising the interfacial integrity and resulting in premature thermal resistance degradation or solder interconnect failure. In this study, the interfacial stress intensity factor has been measured under sustained temperature for a period of up to one year, using CNF specimens to measure mode-l and mode-2 fracture toughness. Fatigue crack growth measurements have been to fit the Paris Power Law to compute the fatigue exponent. The fracture toughness measurements have been mapped to cohesive-zone damage parameters for implementation in a finite-element framework. Finally, a competing risk model has been created to assess the risk of failure of multiple interfaces, including the chip-underfill, substrate solder-mask-to-underfill, and thermal interface material-to-copper heat sink interfaces. The study results have been validated with experimental data to ensure accuracy.