Xvpfloat: RISC-V ISA Extension for Variable Extended Precision Floating Point Computation

A key concern in the field of scientific computation is the convergence of numerical solvers when applied to large problems. The numerical workarounds used to improve convergence are often problem specific, time consuming and require skilled numerical analysts. An alternative is to simply increase the working precision of the computation, but this is difficult due to the lack of efficient hardware support for extended precision. We propose
Xvpfloat
, a RISC-V ISA extension for dynamically variable and extended precision computation, a hardware implementation and a full software stack. Our architecture provides a comprehensive implementation of this ISA, with up to 512 bits of significand, including full support for common rounding modes and heterogeneous precision arithmetic operations. The memory subsystem handles IEEE 754 extendable formats, and features specialized indexed loads and stores with hardware-assisted prefetching. This processor can either operate standalone or as an accelerator for a general purpose host. We demonstrate that the number of solver iterations can be reduced up to
$5\boldsymbol{\times}$
and, for certain, difficult problems, convergence is only possible with very high precision (
$\boldsymbol{\geq}$
384 bits). This accelerator provides a new approach to accelerate large scale scientific computing.