Data Locality Aware Computation Offloading in Near Memory Processing Architecture for Big Data Applications

The data-intensive applications of today's big data era often produce a large memory footprint. As a result, a significant volume of data needs to travel from memory to the CPU under the traditional Von-Neumann computing paradigm. Near-memory processing (NMP) or processing-in-memory (PIM) is a potential alternate computation framework where a computation unit is placed near the memory (or inside the memory) and a portion of an application is executed on it (termed computation offloading) aiming to reduce the amount of data movement and its consequences. Although a few computation offloading strategies have been proposed in recent times, the existing approaches do not consider the data locality offered by the last level cache and the overall execution time of the application while designing their policies. In this paper, we propose a data locality-aware computation offloading strategy for a hybrid computing system comprising the host processor and NMP-enabled 3D memory. After the application code is instrumented using the LLVM compiler framework, the strategy offloads a portion of an application to NMP if its estimated overall execution time is less. An extensive simulation performed on a set of standard simulators for a bunch of large graph-based application benchmarks reports the effectiveness of the proposed strategy by achieving a maximum speedup of 40% and 11.8% as compared to the host-only configuration and the state-of-art policy, respectively. The proposed strategy also reduces the off-chip data transfer and energy consumption by a significant margin as compared to the host-only configuration (avg 27%) and the state-of-art policy (avg 28%). Further, the proposed policy reduces the LLC miss rate by 57% as compared to the state-of-art policy.