Margin Propagation based Analog Soft-Gates for Probabilistic Computing

Soft computing gates offer a promising approach for efficient and parallel processing of probabilistic signals. These gates are widely used in Bayesian networks and various machine learning models. However, unlike digital logic gates, the design and scaling of analog Soft-Gates is challenging due to analog artifacts, i.e., sensitivity to biasing, mismatch, and temperature variations. In this paper, we present a systematic framework for designing analog Soft-Gates that leverage the bias and temperature scalability of the Margin Propagation principle. Specifically, the paper proposes an adaptive design strategy to alleviate mismatch artifacts and to trade-off probabilistic computational accuracy, area efficiency, and power consumption. We demonstrate the design synthesis of a Soft-Gate and apply it to error correction decoding and filtering tasks. The reported Mean Square Error of the Soft-Gate is less than $10 ^{-2}$, indicating its accuracy in probabilistic computations. For edge filtering applications, the proposed Soft-Gates can achieve an average Structural Similarity Index of 0.95. The estimated energy consumption in 180nm CMOS technology is in the order of pico-Joules, validating the gate’s energy efficiency.