Patterning Infrastructure Development for Advanced EUV Lithography: Continuing Dimensional Scaling Through EUV Lithography to Support Moore’s Law

EUV lithography is currently the state-of-the-art lithography technology that is used for printing the most critical layers in advanced logic and DRAM chips. It uses a 13.5-nm wavelength, and the projection optics have a numerical aperture (NA) of 0.33. EUV has taken over from 193-nm immersion lithography where more and more multiple patterning steps were needed to print these critical layers, resulting in a higher cost, longer turnaround time (TAT), and reduced yield. The newest developments in EUV lithography are to further push the resolution by building a higher NA lens. For that, ASML and Zeiss are developing a new scanner
[1]
and new 0.55-NA optics
[2]
.