Influence of the Use of Delay Block Approximations on the Stability of the SVC

The integration of static thyristor compensators (SVCs) provides significant advantages to power systems, as they can regulate voltage and improve the quality of the electrical energy, which is a crucial factor in modern power systems. Many models of SVCs used in the preliminary stages of design and development contain a pure delay block (
${{\mathrm{e}}^{ - \mathrm{s}{{\mathrm{T}}_{\mathrm{d}}}}}$
) caused by the firing delay angle of the thyristors, which is part of the modeling and analysis process of SVCs. In this article, it is analyzed the impact of the approximation of the pure delay block on the performance of SVCs. To do this, various approximations are proposed for modeling this block and conduct a comparative analysis of their accuracy. The results of this research allow to determine the most accurate methods for modeling the pure delay block in SVCs.