A Fully Integrated Darlington-Cascode Distributed Amplifier With m-Derived Matching Sections

This letter proposes a fully integrated 0.01–40-GHz Darlington-cascode distributed amplifier (DA) fabricated using a commercial 0.15-
$\mu \text{m}$
GaAs pHEMT process. Analysis indicates that the Darlington-cascode gain cell (DCGC) can enhance gain, bandwidth, and output power simultaneously. The first and last stages of the DA can be considered equivalent to two m-derived matching sections, optimizing the return loss at the input port. An ON-chip dc-fed network is employed for biasing the DA. The chip area of the DA is about
$1.8\times1.5$
mm. Measurement results demonstrate that the DA achieves a gain of 11 dB with ±1.5-dB flatness, 14%–24% power-added efficiency (PAE), and 17.2–19.5-dBm saturated output power.